CASE STUDY

Reduced the overall HC demands with an integrated platform architecture

For a leading semiconductor chip maker

Client

The client is one of the world’s largest and highest valued semiconductor chip maker

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Expectation

The client wanted an integrated platform architecture that could reduce the overall HC needs at the frontend, allow for same RTL base line, accommodate common interconnect, and utilize same database with Modem swaps.

Team

A senior resource with the designation of a Design Manager led the CDMA base station and Femto station programs from SoC architecture to Customer Samples

Duration

12 months / 15 months for tapeout
24 / 30 months for Customer Samples

ROLES & RESPONSIBILITIES

Team Cienra was able to deliver successful customer samples through the execution of architecture, interconnect design, synthesis, physical design implementation, and post Si Validation.
We were able to:

  • Deliver 45 nm full-chip SoC
    From concept to implementation
  • Design a 2-chip solution
    With one-quarter T/O gap, despite complex IPs coming from varied types of modems
  • Handle complexity
    In terms of size > 100 mm2 die size & frequency (>1GHZ) for the CPU

PROJECT SPECIFICATIONS

DESIGN CHALLENGES

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